Important Dates

Submission
deadline:
20th January 2017
Notification of
acceptance:
04th March 2017
Camera-ready
papers:
24th March 2017
Conference dates: 19th to 21th April 2017

Call For Papers

Prospective authors are cordially invited to submit original papers to the Symposium. Papers in English with a length of 6 pages maximum in IEEE conference style are expected. Specialized student and industrial sessions, as well as embedded tutorials, will be organized at the symposium. Accepted papers will be included in the Symposium Proceedings and submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing databases (WoS, Scopus, etc). An extra work-in-progress session will be targeted to get early feedback on in-progress research and preliminary results (these papers will not be included in IEEE Xplore).

A special Issue/Section of IEEE Transactions on Emerging Topics in Computing will be dedicated to the selected DDECS 2017 papers that fit to the scope of the journal. Authors of those papers, presented at DDECS 2017, will be encouraged to submit a substantially extended version to the special issue, which will then undergo a full competitive review process. There will be a specific call for this special issue with more details on submission after the conference.

Topics

DDECS covers the areas of design and testing of electronic components, both digital and analog. The topics include the following but are not limited to:

  • SoC and NoC Design and Test
  • ASIC/FPGA Design
  • Built-in Self-Test and Self-Repair
  • Bio-Inspired Hardware
  • Design Verification/Validation
  • Formal Methods in System Design
  • Hardware/Software Co-Design
  • IP-based Design
  • Logic Synthesis
  • Defect/Fault Tolerance and Reliability
  • Design and Test in Nano-Technologies
  • Analog, Mixed-Signal, RF Design and Test
  • ATE Hardware and Software
  • Design for Testability and Diagnosis
  • On-line Testing
  • Embedded Systems
  • Memory, Processor Testing
  • MEMS Testing
  • Physical Design
  • Cyber Physical Systems

Further Information

General Chair

Manfred Dietrich

Fraunhofer Institute for Integrated Circuits
Division Engineering of Adaptive Systems
Zeunerstraße 38
01069 Dresden, Germany
Phone: +49 351 4640 715
manfred.dietrich@eas.iis.fraunhofer.de

Program Chair

Ondřej Novák

Technical University of Liberec
Institute for Information Technology and Electronics
Studentská 2
46117 Liberec, Czech Republic
Phone: +420 48 535 3460
ondrej.novak@tul.cz

Fraunhofer IIS/EAS

Organizer

Fraunhofer IIS/EAS

Fraunhofer-Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS

Sponsors


Technically 	Co-Sponsored by the IEEE Computer Society




Technically 	Co-Sponsored by Cadence




Technically 	Co-Sponsored by BOSCH Sensortec

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